Курсовая работа: Синтез схеми ПЛІС для інвертора

use IEEE.STD_LOGIC_ARITH.ALL;

use IEEE.STD_LOGIC_UNSIGNED.ALL;

-- project top file

entity gnome_mcu is

Port ( clk : in std_logic;

Reset : in std_logic;

we_view : out std_logic;

carry_view : out std_logic;

oe_view : out std_logic;

sel_ram_view : out std_logic;

pc_view : out std_logic_vector (6 downto 0);

acc_view : out std_logic_vector (3 downto 0);

data_view : out std_logic_vector(7 downto 0);

addr_view : out std_logic_vector(6 downto 0);

ir_view : out std_logic_vector(7 downto 0));

end gnome_mcu;

architecture structural of gnome_mcu is

component gnome port

(

clk: IN STD_LOGIC;-- clock

reset: IN STD_LOGIC;-- reset control input

address: OUT STD_LOGIC_VECTOR (6 DOWNTO 0); -- ext memory addr

data: INOUT STD_LOGIC_VECTOR (7 DOWNTO 0); -- ext memory data bus

--csb: OUT STD_LOGIC;-- active-low chip-select for external RAM

web: OUT STD_LOGIC;-- active-low write-enable for external RAM

oeb: OUT STD_LOGIC;-- active-low output-enable for external RAM

sel_ram: out std_logic;

carry_out : out std_logic;

pc_out: OUT STD_LOGIC_VECTOR (6 DOWNTO 0);