Курсовая работа: Синтез схеми ПЛІС для інвертора

alu_op <= ADD_OP;-- IR to the ACC

END IF;

IF curr_ir(7)=JUMP THEN

-- jump to the address stored in the

jump_pc <= '1';

-- lower 7 bits of the IR

END IF;

IF curr_ir(7 DOWNTO 4)=STORE_DIR THEN

-- write the ACC to RAM

sel_data_ram <= '1';

write <= '1';

END IF;

IF curr_ir(7 DOWNTO 4)=LOAD_DIR THEN

-- load the ACC with the

alu_op <= PASS_OP;

-- data read from RAM in the previous cycle

END IF;

IF curr_ir(7 DOWNTO 4)=ADD_DIR THEN

-- add the data read from RAM in

alu_op <= ADD_OP;

-- the previous cycle to the ACC

END IF;

IF curr_ir(7 DOWNTO 4)=XOR_DIR THEN

-- XOR the data read from RAM in

alu_op <= XOR_OP;

-- the previous cycle to the ACC

END IF;

IF curr_ir(7 DOWNTO 4)=TEST_DIR THEN

-- mask the ACC with the value