Курсовая работа: Синтез схеми ПЛІС для інвертора

read <= '1';

ld_ir_lsn <= '1';

END IF;

IF curr_ir(7 DOWNTO 4)=TEST_DIR THEN

sel_data_ram <= '1';

read <= '1';

ld_ir_lsn <= '1';

END IF;

next_st <= EXECUTE;-- then execute the instruction

WHEN EXECUTE =>

-- execute the instruction.

IF curr_ir=CLEAR_C THEN

alu_op <= CLR_CARRY_OP;-- clear the carry flag

END IF;

IF curr_ir=SET_C THEN

alu_op <= SET_CARRY_OP;-- set the carry flag

END IF;

IF curr_ir=SKIP_C THEN-- skip the next instruction

inc_pc <= curr_carry; -- if the carry flag is set

END IF;

IF curr_ir=SKIP_Z THEN-- skip the next instruction

inc_pc <= curr_zero; -- if the zero flag is set

END IF;

IF curr_ir(7 DOWNTO 4)=LOAD_IMM THEN

-- load the ACC with immediate

alu_op <= PASS_OP;

-- data from the lower 4 bits of IR

END IF;

IF curr_ir(7 DOWNTO 4)=ADD_IMM THEN